Allwinner A20 - TWI Register Description

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 579 / 812
Register Name
Offset
Description
TWI_ADDR
0x0000
TWI Slave address
TWI_XADDR
0x0004
TWI Extended slave address
TWI_DATA
0x0008
TWI Data byte
TWI_CNTR
0x000C
TWI Control register
TWI_STAT
0x0010
TWI Status register
TWI_CCR
0x0014
TWI Clock control register
TWI_SRST
0x0018
TWI Software reset
TWI_EFR
0x001C
TWI Enhance Feature register
TWI_LCR
0x0020
TWI Line Control register
6.2.4. TWI Register Description
6.2.4.1. TWI SLAVE ADDRESS REGISTER
Offset: 0x00
Register Name: TWI_ADDR
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:8
/
/
/
7:1
R/W
0
SLA
Slave address
7-bit addressing
SLA6, SLA5, SLA4, SLA3, SLA2, SLA1, SLA0
10-bit addressing
1, 1, 1, 1, 0, SLAX[9:8]
0
R/W
0
GCE
General call address enable
0: Disable
1: Enable