A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 12 / 812
System Resources
●
Timer
– 6 timers: clock source can be switched over 24M/32K for all timers, and external signals can be used
as clock source for Timer4/5
– Two 33-bit AVS counters
– Watchdog to generate reset signal or interrupt
– Real time counter for second, minute, hour, day, month, and year
●
High Speed Timer
– 4 channels
– Clock source is fixed to AHB, and the pre-scale ranges from 1 to 16
– 56-bit counter that can be separated to 24-bit high register and 32-bit low register
●
DMA
– 16 channels:8 channels with normal DMA,8 channels with dedicated DMA
– Support data width of 8/16/32 bits
– Support linear and IO address modes
●
CCU
– 8PLLs
– a main 24MHz oscillator
– an on-chip RC oscillator
– a 32768Hz oscillator (optional)
– Clock management: clock gating ,clock enabling to the device modules, clock reset, clock generation,
clock division
●
GIC
– Support 16 SGIs, 16 PPIs, and 128 SPIs
– Support ARM architecture security extensions
– Support ARM architecture virtualization extensions
– Support uniprocessor and multiprocessor environments
Video Engine (Phoenix 3.0)
● Video Decoding
– Support picture size up to 3840x2160
– Support decoding speed up to 1080p@60fps
– Supported formats: Mpeg1/2, Mpeg4 SP/ASP GMC, H.263 including Sorenson Spark, H.264
BP/MP/HP, VP6/8, AVS jizun, Jpeg/Mjpeg, etc.
● Video Encoding
– H.264 HP up to 1080p@30fps
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