A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 479 / 812
DEFE Field Sequence Register
DEFE Channel 0 Tile-Based Offset Register
DEFE Channel 1 Tile-Based Offset Register
DEFE Channel 2 Tile-Based Offset Register
DEFE Channel 0 Line Stride Register
DEFE Channel 1 Line Stride Register
DEFE Channel 2 Line Stride Register
DEFE Input Format Register
DEFE Channel 3 Write Back Address Register
DEFE Channel 4 Write Back Address Register
DEFE Channel 5 Write Back Address Register
DEFE Output Format Register
DEFE Interrupt Enable Register
DEFE Interrupt Status Register
DEFE CSC Coefficent 00 Register
DEFE CSC Coefficent 01 Register
DEFE CSC Coefficent 02 Register
DEFE CSC Coefficent 03 Register
DEFE CSC Coefficent 10 Register
DEFE CSC Coefficent 11 Register
DEFE CSC Coefficent 12 Register
DEFE CSC Coefficent 13 Register
DEFE CSC Coefficent 20 Register
DEFE CSC Coefficent 21 Register
DEFE CSC Coefficent 22 Register
DEFE CSC Coefficent 23 Register
DEFE De-interlacing Control Register
DEFE De-interlacing Diag-Interpolate Register
DEFE De-interlacing Temp-Difference
Register
DEFE De-interlaing Sawtooth Register