Allwinner A20 - Page 186

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 186 / 812
Offset:0x28
Register Name: AC_PA_ADC_ACTRL
Bit
R/W
Default
Description
1:0
R/W
0x0
PTDBS.
HPCOM protect de-bounce time setting
00: 2-3ms
01: 4-6ms
10: 8-12ms
11: 16-24ms
1.13.4.11. DAC TX COUNTER REGISTER
Offset: 0x30
Register Name: AC_DAC_CNT
Bit
Read/Write
Default
Description
31:0
R/W
0x0
TX_CNT.
TX Sample Counter
The audio sample number of sending into TXFIFO. When one
sample is put into TXFIFO by DMA or by host IO, the TX
sample counter register increases by one. The TX sample
counter register can be set to any initial valve at any time. After
been updated by the initial value, the counter register should
count on base of this initial value.
Notes: It is used for Audio/ Video Synchronization
1.13.4.12. ADC RX COUNTER REGISTER
Offset: 0x34
Register Name: AC_ADC_CNT
Bit
Read/Write
Default
Description
31:0
R/W
0x0
RX_CNT.
RX Sample Counter
The audio sample number of writing into RXFIFO. When one
sample is written by Digital Audio Engine, the RX sample
counter register increases by one. The RX sample counter
register can be set to any initial valve at any time. After been
updated by the initial value, the counter register should count
on base of this initial value.
Notes: It is used for Audio/ Video Synchronization