Allwinner A20 - Page 197

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 197 / 812
Offset: 0x08
Register Name: LRADC_INT
Bit
Read/
Write
Default/He
x
Description
interrupt if the interrupt is enabled.
1
R/W
0x0
ADC0_KEYDOWN_PENDING.
ADC 0 Key Down IRQ Pending Bit
When General key pull down, the status bit is set and the
interrupt line is set if the corresponding interrupt is enabled.
0: No IRQ
1: IRQ Pending
Notes: Writing 1 to the bit will clear it and its corresponding
interrupt if the interrupt is enabled.
0
R/W
0x0
ADC0_DATA_PENDING.
ADC 0 Data IRQ Pending Bit
0: No IRQ
1: IRQ Pending
Notes: Writing 1 to the bit will clear it and its corresponding
interrupt if the interrupt is enabled.
1.14.4.4. LRADC DATA 0 REGISTER
Offset: 0x0c
Register Name: LRADC_DATA
Bit
Read/
Write
Default/He
x
Description
31:6
/
/
/
5:0
R
0x0
LRADC0_DATA.
LRADC 0 Data
1.14.4.5. LRADC DATA 1 REGISTER
Offset: 0x10
Register Name: LRADC_DATA
Bit
Read/
Write
Default/He
x
Description
31:6
/
/
/
5:0
R
0x0
LRADC1_DATA.
LRADC 1 Data