Allwinner A20 - Page 236

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 236 / 812
Port F(PF)
Multiplex Function Select
PF1
SDC0_D0
JTAG_DI1
PF2
SDC0_CLK
UART0_TX
PF3
SDC0_CMD
JTAG_DO1
PF4
SDC0_D3
UART0_RX
PF5
SDC0_D2
JTAG_CK1
Port F(PF) Multiplex Function Select Table
Port G(PG)
Multiplex Function Select
PG0
TS1_CLK
CSI1_PCLK
SDC1_CMD
PG1
TS1_ERR
CSI1_MLCK
SDC1_CLK
PG2
TS1_SYNC
CSI1_HSYNC
SDC1_D0
PG3
TS1_DVLD
CSI1_VSYNC
SDC1_D1
PG4
TS1_D0
CSI1_D0
SDC1_D2
CSI0_D8
PG5
TS1_D1
CSI1_D1
SDC1_D3
CSI0_D9
PG6
TS1_D2
CSI1_D2
UART3_TX
CSI0_D10
PG7
TS1_D3
CSI1_D3
UART3_RX
CSI0_D11
PG8
TS1_D4
CSI1_D4
UART3_RTS
CSI0_D12
PG9
TS1_D5
CSI1_D5
UART3_CTS
CSI0_D13
PG10
TS1_D6
CSI1_D6
UART4_TX
CSI0_D14
PG11
TS1_D7
CSI1_D7
UART4_RX
CSI0_D15
Port G(PG) Multiplex Function Select Table
Port
H(PH)
Multiplex Function Select
PH0
LCD1_D0
UART3_TX
EINT0
CSI1_D0
PH1
LCD1_D1
UART3_RX
EINT1
CSI1_D1
PH2
LCD1_D2
UART3_RT
S
EINT2
CSI1_D2
PH3
LCD1_D3
UART3_CT
S
EINT3
CSI1_D3
PH4
LCD1_D4
UART4_TX
EINT4
CSI1_D4
PH5
LCD1_D5
UART4_RX
EINT5
CSI1_D5
PH6
LCD1_D6
UART5_TX
MS_BS
EINT6
CSI1_D6