Allwinner A20 - Page 272

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 272 / 812
Offset: 0xB4
Register Name: PF_CFG0
Default Value: 0x0040_4044
Bit
Read/Write
Default
Description
010: SDC0_CMD 011: Reserved
100: JTAG_DO1 101: Reserved
110: Reserved 111: Reserved
11
/
/
/
10:8
R/W
0
PF2_SELECT
000: Input 001: Output
010: SDC0_CLK 011: Reserved
100: UART0_TX 101: Reserved
110: Reserved 111: Reserved
7
/
/
/
6:4
R/W
0x4
PF1_SELECT
000: Input 001: Output
010: SDC0_D0 011: Reserved
100: JTAG_DI1 101: Reserved
110: Reserved 111: Reserved
3
/
/
/
2:0
R/W
0x4
PF0_SELECT
000: Input 001: Output
010: SDC0_D1 011: Reserved
100: JTAG_MS1 101: Reserved
110: Reserved 111: Reserved
1.19.4.47. PF CONFIGURE REGISTER 1
Offset: 0xB8
Register Name: PF_CFG1
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
/
/
/