Allwinner A20 - Page 290

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 290 / 812
Offset: 0x124
Register Name: PI_CFG1
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
010: SPI0_CS0 011: UART5_TX
100: Reserved 101: Reserved
110: EINT22 111: Reserved
7
/
/
/
6:4
R/W
0
PI9_SELECT
000: Input 001: Output
010: SDC3_D3 011: Reserved
100: Reserved 101: Reserved
110: Reserved 111: Reserved
3
/
/
/
2:0
R/W
0
PI8_SELECT
000: Input 001: Output
010: SDC3_D2 011: Reserved
100: Reserved 101: Reserved
110: Reserved 111: Reserved
1.19.4.74. PI CONFIGURE REGISTER 2
Offset: 0x128
Register Name: PI_CFG2
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:23
/
/
/
22:20
R/W
0
PI21_SELECT
000: Input 001: Output
010: PS2_SDA0 011: UART7_RX
100: HSDA 101: Reserved
110: Reserved 111: Reserved
19
/
/
/
18:16
R/W
0
PI20_SELECT
000: Input 001: Output
010: PS2_SCK0 011: UART7_TX
100: HSCL 101: Reserved