Allwinner A20 - Page 323

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 323 / 812
Offset: 0x78
Register Name: MP_CSC1CTL_REG
Bit
Read/W
rite
Default/He
x
Description
In mode 2/3/4, following rule:
----Y component data transfer through channel 3, and UV
component data transfer through channel 2.
----In this mode, the output data of the input formatter 2 will be
stead of the respective fill-color value.
3:1
/
/
/
0
R/W
0
CSC1_EN
Enable control
0:
Disable color space function, ignore the control setting, and
the data flow will by-pass the module.
1:
Enable color space converting function.
3.1.4.13. SCALER CONTROL REGISTER
Offset: 0x80
Register Name: MP_SCACTL_REG
Bit
Read/W
rite
Default/He
x
Description
31:6
/
/
/
5:4
R/W
0
SCA_ALGSEL
Scaling algorithm selection
0: bi-cubic(4 taps in vertical and horizontal)
1: linear in vertical and bi-linear in horizontal(2 taps in vertical
and 4 taps in horizontal)
2: extractive in vertical and bi-linear in horizontal(1 tap in
vertical and 4 taps in horizontal)
3: reserved
3:1
/
/
/
0
R/W
0
SCA_EN
Enable control
0:
Disable scaler, ignore the whole scaling setting, and the data
flow will by-pass the module.
1: