Allwinner A20 - Page 427

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 427 / 812
5.1.4.29. TCON1 BASIC TIMING REGISTER5
Offset: 0x0A8
Register Name: TCON1_BASIC5_REG
Bit
Read/
Write
Default/
Hex
Description
31:26
/
/
/
25:16
R/W
0
HSPW
horizontal Sync Pulse Width (in dclk)
Thspw = (HSPW+1) * Tdclk
Note: HT> (HSPW+1)
15:10
/
/
/
9:0
R/W
0
VSPW
vertical Sync Pulse Width (in lines)
Tvspw = (VSPW+1) * Th
Note: VT/2 > (VSPW+1)
5.1.4.30. TCON1 IO POLARITY REGISTER
Offset: 0x0F0
Register Name: TCON1_IO_POL_REG
Bit
Read/
Write
Default/
Hex
Description
31:28
/
/
/
27
R/W
0
IO3_Inv
0: not invert
1: invert
26
R/W
0
IO2 Inv
0: not invert
1: invert
25
R/W
0
IO1_Inv
0: not invert
1: invert
24
R/W
0
IO0_Inv
0: not invert
1: invert