Allwinner A20 - Page 447

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 447 / 812
Offset: 0x044
Register name: ADMA_Ctrl
Bits
Read
/Write
Default
/Hex
Description
01: 1/4 FIFO empty
10: 1/8 FIFO empty
11: reserved
23:20
/
/
reserved
19
R/W
0
AUD_SRC_DMA_SAMPLE_RATE:
0: 2 sample per transfer(only AUD_SRC_WORD_LEN = 00)
1: 1 sample per transfer
18
R/W
0
AUD_SRC SAMPLE_LAYOUT
0: LSB Align
1: MSB Align
17:16
R/W
0
AUD_SRC_WORD_LEN:
00: 16-bit
01: 20-bit
10: 24-bit
11: reserved
15
R/W
0
AUD_FIFO_CLEAR:
Audio FIFO flush enable
0:normal
1:clear the audio input FIFO
14:1
/
/
reserved
0
R/W
0
AUD_DATA_SEL:
0: last sample
1: all 0’s
Audio data to send when FIFO is underflow
5.2.4.13. AUDIO FORMAT CONTROL REGISTER
Offset: 0x048
Register name: Aud_Fmt
Bits
Read
/Write
Default
/Hex
Description