Allwinner A20 - Page 542

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 542 / 812
Offset:
Layer0: 0x890
Layer1: 0x894
Layer2: 0x898
Layer3: 0x89C
Register Name: DEBE_ATTCTL_REG0
Bit
Read/W
rite
Default/
Hex
Description
Normally, one layer can not be set both video channel and YUV
channel mode, if both 2 mode is set, the layer will work in video
channel mode, YUV channel mode will be ignored, programmer
should confirm it.
Setting 2 or more layers video channel mode is illegal,
programmer should confirm it.
0
R/W
UDF
LAY_GLBALPHAEN
Alpha Enable
0: Disabled the alpha value of this register
1: Enabled the alpha value of this register for the layer
5.4.4.13. DE-LAYER ATTRIBUTE CONTROL REGISTER1
Offset:
Layer0: 0x8A0
Layer1: 0x8A4
Layer2: 0x8A8
Layer3: 0x8AC
Register Name: DEBE_ATTCTL_REG1
Bit
Read/W
rite
Default/
Hex
Description
31:16
/
/
/
15:14
R/W
UDF
LAY_HSCAFCT
Setting the internal frame buffer scaling factor, only valid in
internal frame buffer mode
SH
Height scale factor
00: no scaling
01: *2
10: *4