Allwinner A20 - Page 550

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 550 / 812
Offset: 0x8F0
Register Name: DEBE_WBCTL_REG
Bit
Read/W
rite
Default/
Hex
Description
8
R/W
UDF
WB_STATUS
Write-back process status
0:
write-back end or write-back disable
1:
write-back in process
This flag indicates that a full frame has not been written back to
memory. The bit will be set when write-back enable bit is set, and
be cleared when write-back process end.
7:2
/
/
/
1
R/W
UDF
WB_WOC
Write back only control
0:
disable the write back only control, the normal channel data of
back end will transfer to LCD/TV controller too.
1:
enable the write back only function, the all output data will by
pass the LCD/TV controller.
0
R/W
UDF
WB_EN
Write back enable
0: Disable
1: Enable
If normal channel of back-end is selected by LCD/TV controller
(write back only function is disabled), the writing back process
will start when write back enable bit is set and a new frame
processing begins.
The bit will be cleared when the new writing-back frame start to
process.
5.4.4.18. DE BACKEND WRITE BACK ADDRESS REGISTER
Offset: 0x8F4
Register Name: DEBE_WBADD_REG