Allwinner A20 - Page 555

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 555 / 812
5.4.4.25. DE-SPRITE SINGLE BLOCK ADDRESS SETTING SRAM ARRAY
Offset:
Block 0: 0xC00
Block 1: 0xC04
Block 2: 0xC08
.
.
.
Block 31: 0xC7C
Register Name: DEBE_SPRADD_SRAM
Bit
Read/W
rite
Default/
Hex
Description
31:0
R/W
UDF
SPR_ADD
Sprite start address
Sprite buffer start address in BYTE
DE-SPRITE LINE WIDTH SETTING SRAM ARRAY
Offset:
Block 0: 0xD00
Block 1: 0xD04
Block 2: 0xD08
.
.
.
Block 31: 0xD7C
Register Name: DEBE_SPRLINEWIDTH_SRAM
Bit
Read/W
rite
Default/H
ex
Description
31:0
R/W
UDF
SPR_LINEWIDTH
Sprite single block line width
Sprite single block line width in bits
5.4.4.26. DE BACKEND INPUT YUV CHANNEL CONTROL REGISTER
Offset: 0x920
Register Name: DEBE_IYUVCTL_REG
Bit
Read/W
rite
Default/
Hex
Description