Allwinner A20 - Page 699

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 699 / 812
Left Channel
Right Channel
MSB
LSB
MSB
LSB
Left-justified I2S Timing Diagram
I2S_LRC
I2S_SCLK
I2S_SDO/SDI
Left Channel
Right Channel
MSB
LSB
MSB
LSB
Right-justified I2S Timing Diagram
I2S_LRC
I2S_SCLK
I2S_SDO/SDI
2 Clocks
1
2
3
4
5
6
7
8
Undefined
1
2
3
4
5
6
7
8
Undefined
PCM Long Frame SYNC Timing Diagram (8-bits Companded Sample Example)
PCM_SYNC
PCM_CLK
PCM_OUT
PCM_IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Undefined
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Undefined
PCM Short Frame SYNC Timing Diagram (16-bits sample example)
PCM_SYNC
PCM_CLK
PCM_OUT
PCM_IN