ARM Cortex-A53 MPCore - Page 175

System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-114
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Table 4-103 PAR_EL1 pass bit assignments
Bits Name Function
[63:60] AttrH Defines Normal or Device memory and outer cacheability. Must be used in conjunction with AttrL. The
possible values are:
0b0000 Device memory, see Attr[3:0].
0b0100 Normal memory, Outer Non-cacheable.
0b1000 Normal memory, Outer Write-Through Cacheable.
0b1001 Normal memory, Outer Write-Through Cacheable, Outer Write-Allocate.
0b1010 Normal memory, Outer Write-Through Cacheable, Outer Read-Allocate.
0b1011 Normal memory, Outer Write-Through Cacheable, Outer WriteAllocate, Outer Read-Allocate.
0b1100 Normal memory, Outer Write-Back Cacheable.
0b1101 Normal memory, Outer Write-Back Cacheable, Outer Write-Allocate.
0b1110 Normal memory, Outer Write-Back Cacheable, Outer Read-Allocate.
0b1111 Normal memory, Outer Write-Back Cacheable, Outer Write-Allocate, Outer Read-Allocate.
All other values are reserved.
[59:56] AttrL Defines Device memory, and Inner cacheability. Must be interpreted in conjunction with AttrH. The possible
values are:
0b0000 Device (nGnRnE) memory if AttrH is 0b0000 . Otherwise this value is reserved.
0b0100 Device (not nGnRnE) memory if AttrH is 0b0000 . Otherwise, Normal memory, Inner
Non-cacheable.
0b1000 Reserved if AttrH is 0b0000 . Otherwise, Normal memory, Inner Write-Through Cacheable.
0b1001 Reserved if AttrH is 0b0000 . Otherwise, Normal memory, Inner Write-Through Cacheable,
Inner Write-Allocate.
0b1010 Reserved if AttrH is 0b0000 . Otherwise, Normal memory, Inner Write-Through Cacheable,
Inner Read-Allocate.
0b1011 Reserved if AttrH is 0b0000 . Otherwise, Normal memory, Inner Write-Through Cacheable,
Inner Write-Allocate, Inner Read-Allocate.
0b1100 Reserved if AttrH is 0b0000 . Otherwise, Normal memory, Inner Write-Back Cacheable.
0b1101 Reserved if AttrH is 0b0000 . Otherwise, Normal memory, Inner Write-Back Cacheable, Inner
Write-Allocate.
0b1110 Reserved if AttrH is 0b0000 . Otherwise, Normal memory, Inner Write-Back Cacheable, Inner
Read-Allocate.
0b1111 Reserved if AttrH is 0b0000 . Otherwise, Normal memory, Inner Write-Through Cacheable,
Inner Write-Allocate, Inner Read-Allocate.
All other values are reserved.
[55:48] - Reserved,
RES0.
[47:12] PA Physical address. The Physical Address corresponding to the supplied Virtual Address. Returns address
bits[47:12].
[11] - Reserved,
RES1.
[10] - Reserved,
RES0.
[9] NS Non-secure. The NS attribute for a translation table entry read from Secure state.
This bit is
UNKNOWN for a translation table entry from Non-secure state.