Debug
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 11-36
ID021414 Non-Confidential
11.9 Debug events
A debug event can be either:
• A software debug event.
• A halting debug event.
A core responds to a debug event in one of the following ways:
• Ignores the debug event.
• Takes a debug exception.
• Enters debug state.
This section describes debug events in:
• Watchpoint debug events.
• Debug OS Lock.
See the ARM
®
Architecture Reference Manual ARMv8, for ARMv8-A architecture profile for
more information on debug events.
11.9.1 Watchpoint debug events
In the Cortex-A53 processor, watchpoint debug events are always synchronous. Memory hint
instructions and cache clean operations, except DC ZVA, DC IVAC, and DCIMVAC, do not
generate watchpoint debug events. Store exclusive instructions generate a watchpoint debug
event even when the check for the control of exclusive monitor fails.
For watchpoint debug events, except those resulting from cache maintenance operations, the
value reported in DFAR is guaranteed to be no lower than the address of the watchpointed
location rounded down to a multiple of 16 bytes.
11.9.2 Debug OS Lock
Debug OS Lock is set by the powerup reset, nCPUPORESET, see Resets on page 2-14. For
normal behavior of debug events and debug register accesses, Debug OS Lock must be cleared.
For more information, see the ARM
®
Architecture Reference Manual ARMv8, for ARMv8-A
architecture profile.
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