ARM Cortex-A53 MPCore - Processor Configuration

Introduction
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• All cores share a common L2 cache.
1.5.1 Processor configuration
All cores in a cluster have identical configurations, that were determined during the build
configuration. These configurations cannot be changed by software:
• Either all of the cores have L1 cache protection, or none have.
• Either all of the cores have Advanced SIMD and Floating-point Extensions, or none have.
• Either all of the cores have Cryptography Extensions, or none have.
• All cores must have the same size L1 caches as each other.