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ARM Cortex-A53 MPCore - Chapter 12 Performance Monitor Unit; About the PMU

ARM Cortex-A53 MPCore
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Performance Monitor Unit
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 12-2
ID021414 Non-Confidential
12.1 About the PMU
The Cortex-A53 processor includes performance monitors that implement the ARM PMUv3
architecture. These enable you to gather various statistics on the operation of the processor and
its memory system during runtime. These provide useful information about the behavior of the
processor that you can use when debugging or profiling code.
The PMU provides six counters. Each counter can count any of the events available in the
processor. The absolute counts recorded might vary because of pipeline effects. This has
negligible effect except in cases where the counters are enabled for a very short time.

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