EasyManua.ls Logo

ARM Cortex-A53 MPCore - Page 455

ARM Cortex-A53 MPCore
635 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 12-1
ID021414 Non-Confidential
Chapter 12
Performance Monitor Unit
This chapter describes the Performance Monitor Unit (PMU) and the registers that it uses. It
contains the following sections:
About the PMU on page 12-2.
PMU functional description on page 12-3.
AArch64 PMU register summary on page 12-5.
AArch64 PMU register descriptions on page 12-7.
AArch32 PMU register summary on page 12-14.
AArch32 PMU register descriptions on page 12-16.
Memory-mapped register summary on page 12-23.
Memory-mapped register descriptions on page 12-26.
Events on page 12-36.
Interrupts on page 12-40.
Exporting PMU events on page 12-41.

Table of Contents

Related product manuals