Embedded Trace Macrocell
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 13-9
ID021414 Non-Confidential
13.6 ETM trace unit register interfaces
The Cortex-A53 processor supports only memory-mapped interface to trace registers. For more
information see External debug interface on page 11-37.
13.6.1 Access permissions
See the ARM
®
ETM
™
Architecture Specification, ETMv4 for information on the behaviors on
register accesses for different trace unit states and the different access mechanisms.