ARM Cortex-A53 MPCore - Trigger Inputs and Outputs

Cross Trigger
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 14-3
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14.2 Trigger inputs and outputs
This section describes the trigger inputs and outputs that are available to the CTI.
Table 14-1 shows the CTI inputs.
Table 14-2 shows the CTI outputs.
Table 14-1 Trigger inputs
CTI input Name Description
0 DBGTRIGGER, pulsed Pulsed on entry to debug state
1
PMUIRQ
a
a. This signal is the same as nPMUIRQ with inverted polarity.
PMU generated interrupt
2- -
3- -
4 EXTOUT[0] ETM trace unit external output
5 EXTOUT[1] ETM trace unit external output
6 EXTOUT[2] ETM trace unit external output
7 EXTOUT[3] ETM trace unit external output
Table 14-2 Trigger outputs
CTI output Name Description
0 EDBGRQ Causes the processor to enter debug state
1 DBGRESTART Causes the processor to exit debug state
2 CTIIRQ CTI interrupt
3- -
4 EXTIN[0] ETM trace unit external input
5 EXTIN[1] ETM trace unit external input
6 EXTIN[2] ETM trace unit external input
7 EXTIN[3] ETM trace unit external input