ARM Cortex-A53 MPCore - Support for V8 Memory Types

Level 1 Memory System
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6.3 Support for v8 memory types
The ARMv8-A architecture introduces several new memory types in place of the ARMv7
Device and Strongly-Ordered memory types. These relate to the following attributes:
G Gathering. The capability to gather and merge requests together into a single
transaction.
R Reordering. The capability to reorder transactions.
E Early-acknowledge. The capability to accept early acknowledge of transactions
from the interconnect.
Table 6-1 describes the ARMv8 memory types.
As defined by the architecture, these bits apply only when the translation table is marked as
ARMv8 Device memory, they do not apply to Normal memory. If an ARMv7 architecture
operating system runs on a Cortex-A53 processor, the Device memory type matches the nGnRE
encoding and the Strongly-Ordered memory type matches the nGnRnE memory type.
Table 6-1 ARMv8 memory types
Memory type Comment
GRE Similar to Normal non-cacheable, but does not permit speculative accesses.
nGRE Treated as nGnRE inside the Cortex-A53 processor, but can be reordered by the external interconnect.
nGnRE Corresponds to Device in ARMv7.
nGnRnE Corresponds to Strongly Ordered in ARMv7. Treated the same as nGnRE inside a Cortex-A53 processor, but
reported differently on AxCACHE.