Debug
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 11-2
ID021414 Non-Confidential
11.1 About debug
This section gives an overview of debug and describes the debug components. The processor
forms one component of a debug system.
The following methods of debugging an ARM processor based SoC exist:
Conventional JTAG debug (‘external’ debug)
This is invasive debug with the core halted using:
• Breakpoints and watchpoints to halt the core on specific activity.
• A debug connection to examine and modify registers and memory, and
provide single-step execution.
Conventional monitor debug (‘self-hosted’ debug)
This is invasive debug with the core running using a debug monitor that resides
in memory.
Figure 11-1 shows a typical external debug system.
Figure 11-1 Typical debug system
This typical system has several parts:
• Debug host.
• Protocol converter on page 11-3.
• Debug target on page 11-3.
• The debug unit on page 11-3.
• Self-hosted debug on page 11-3.
11.1.1 Debug host
The debug host is a computer, for example a personal computer, running a software debugger
such as the DS-5 Debugger. The debug host enables you to issue high-level commands such as
setting breakpoint at a certain location, or examining the contents of a memory address.
Debug host computer running suitable debugger tool
Debug
host
for example, DSTREAM or RealView ICE
Development system containing ARM processor
Debug
target
Protocol
converter
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