ARM Cortex-A53 MPCore - L2 Error Signals; A.8 L2 Error Signals

Signal Descriptions
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A.8 L2 error signals
Table A-8 shows the L2 error signals.
Table A-8 L2 error signals
Signal Direction Description
nEXTERRIRQ Output Error indicator for AXI or CHI transactions with a write response error condition.
See External aborts handling on page 7-18 for more information.
nINTERRIRQ Output Error indicator for L2 RAM double-bit ECC error.