Signal Descriptions
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. A-23
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A.12.3 Write data channel signals
Table A-30 shows the write data channel signals for the ACP interface.
A.12.4 Write response channel signals
Table A-31 shows the write response channel signals for the ACP interface.
A.12.5 Read address channel signals
Table A-32 shows the read address channel signals for the ACP interface.
AWCACHES[3:0] Input Write cache type
AWUSERS[1:0] Input Write attributes:
[0] Inner Shareable.
[1] Outer Shareable.
AW PRO TS[ 2: 0 ] Input Write protection type
Table A-29 Write address channel signals (continued)
Signal Direction Description
Table A-30 Write data channel signals
Signal Direction Description
WREADYS Output Write data ready
WVALIDS Input Write data valid
WDATAS[127:0] Input Write data
WSTRBS[15:0] Input Write byte-lane strobes
WLASTS Input Write data last transfer indication
Table A-31 Write response channel signals
Signal Direction Description
BREADYS Input Write response ready
BVALIDS Output Write response valid
BIDS[4:0] Output Write response ID
BRESPS[1:0] Output Write response
Table A-32 Read address channel signals
Signal Direction Description
ARREADYS Output Read address ready
ARVALIDS Input Read address valid
ARIDS[4:0] Input Read address ID
ARADDRS[39:0] Input Read address
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