Panasonic MN101L Series

Record of Changes
<Record of Changes - 1>
Details of revision from Ver.1.4 to Ver.1.5 in MN101LR05D/04D/03D/02D LSI User's Manual is shown below.
According to the details of revision, "Definition" of the table below is classified into seven groups.
Revision concerning descriptions in LSI User's Manual:
Writing error correction / Description change / Description addition / Description deletion
Revision concerning LSI specifications:
Specification change / Specification addition / Specification deletion
Modification (Ver.1.5)
Definition
Details of Revision
Page Title Line Ver.1.4 Ver.1.5
I-37  Recom-
mended...
XI
XO
Description addition - Unconnect the pins.
II-31 Note 2 - Description change When recovering from SLOW/HALT2/
STOP0 mode, ...
Set the stabilization wait cycle of inter-
nal oscillation to match...
III-12  Multiple
maskable...
2 to 5 Description change When MEMCTR.MIESET is "1" and an
interrupt is processed,...
When MEMCTR.MIESET is "0" and an
interrupt is accepted,...
III-19 Figure:3.1.9 - Description change mov (PERInDT) Dn
mov Dn, (PERInDT)
Save the value of PERInDT in Dn...
mov (PERInDT) Dn
mov Dn, (PERInDT)
Load the value of PERInDT to Dn...
Description addition - mov (PERInEN), Dm
and Dm, Dn
Extract the request bit that...
IV-13 4.2 3 to 4 Description addition - Figure:4.2.1 shows the transition
between each operation mode...
Figure:4.2.1 - Writing error correction NORMAL mode SCLK: oscillation
HALT0 mode SCLK: oscillation
NORMAL mode SCLK: oscillation/stop
HALT0 mode SCLK: oscillation/stop
Description addition - *2 *3
Note - Description addition - Do not perform the transition that is not
listed in Figure:4.2.1.
IV-16 Figure:4.2.5 - Description addition Internal high-speed oscillation stabili-
zation wait time
Internal high-speed oscillation stabili-
zation wait time (15 µs)
IV-18 Figure:4.2.8 - Description addition Internal low-speed oscillation stabiliza-
tion wait time (80 µs)
Internal low-speed oscillation stabiliza-
tion wait time (100 µs)
IV-29  Voltage
Transition...
Program
Setting
example
Description change - Merged with IV-30 in Ver1.4
IV-30  Voltage
Transition...
Mode Transi-
tion
Setting
example
Description change - Merged with IV-30 in Ver1.4
IV-31 4.4 - Description addition - 4.4 Mode/Voltage/Clock Transition...
XI-7 11.2.3 4 Description addition = Frequency adjustment rate ×
0x200000 (in hexadecimal)
= Frequency adjustment rate ×
0x200000 (in hexadecimal) (At Adjust-
ment period = 128 [sec])
XVI-13 Hint - Description addition - During the A/D conversion, if the out-
put level of LSI is changed...
XVI-14
(Ver1.4)
Note - Description deletion Be sure to conduct the following proce-
dures to ensure...
-
Figure:16.3.5 - Description deletion Figure:16.3.5 Recommended Circuit -
XVI-14  Sample
Hold Time
- Description addition -  Sample Hold Time...
Figure:16.3.5 Circuit Example
 External
Capacitor
- Description addition -  External Capacitor...
Figure:16.3.6 Circuit Example with
External Capacitor