Chapter 5
Interrupt Controller
V - 32 Control Registers
5.2.6 Interrupt Accepted Group Register
During a register read, the interrupt accepted group register (IAGR) returns the smallest group number of the
groups generating the interrupt levels accepted by the CPU, specified by IM2 to IM0 of the PSW. The GN4 to
GN0 flag corresponds to the interrupt group number. A branch destination of the interrupt program for each group
can be found , for example, by referencing the contents of the address obtained by adding the interrupt accept
group register value to the leading address of the interrupt vector table. If IM2 to IM0 of the PSW are changed, if
the interrupt control register is manipulated or if a new interrupt cause is generated, the value returned by this reg-
ister may change even during interrupt processing. The IAGR register is a read-only register and can not be writ-
ten. When there are no interrupt factors of the appropriate interrupt level, IAGR returns “0x0000”. Accessing the
IAGR register is meaningless during a NMI interrupt.
■ Interrupt Accepted Group Register (IAGR: 0x00008A00) [8, 16-bit Access Register]
bp 1514131211109876543210
Flag ---------GN4GN3GN2GN1GN0--
At reset 0000000000000000
Access RRRRRRRRRRRRRRRR
bp Flag Description Set condition
15-7 - - -
6-2
GN4
GN3
GN2
GN1
GN0
Group number register The accepted group number is indicated.
1-0 - - -
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