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Panasonic MN103S

Panasonic MN103S
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Chapter 3
Clock Generator
III - 8 Operation
Above recommended ranges are based on unit oscillating evaluation of this LSI. After evaluating the actual oscil-
lating on the target board, determine the final circuit constant, if necessary.
We do not evaluate oscillating of crystal oscillator on this LSI. Set the circuit constant that the oscillator manufac-
turer recommends.
..
Consult the oscillator manufacturer for the appropriate circuit constant because circuit con-
stant of each ceramic or crystal oscillator, which is connected to OSCI/OSCO, depending on
stray capacitance of the oscillator or on the mounting circuit.
..
..
When switching the masked ROM and flash EEPROM version, matching evaluation of each
version and the oscillator is necessary. The masked ROM and flash EEPROM version may
have different oscillating characteristics.
..
3.3.4 Setup Example of Internal Clock
The frequency of the internal clock (MCLK and IOCLK) is determined by setting the PLL control register and the
clock control register.
The following table shows the setting sequence when the oscillator of 10 MHz is connected and operated with 6
multiple by PLL.
Operation clock Internal clock
After reset is released After the setting
System clock
(MCLK)
1/2 of oscillation frequency (5 MHz) 6 multiplication of oscillation frequency (60 MHz)
Peripheral clock
(IOCLK)
1/4 of oscillation frequency (2.5 MHz) 3 multiplication of oscillation frequency (30 MHz)

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