Chapter 6
ROM Correction
VI - 4 ROM Correction Control Registers
6.2.2 ROM Correction Control Registers
This register that is a 8-bit readable / writable register controls ROM correction.
■ ROM Correction Control Registers (RCRCTR: 0x7FF00000) [8, 16, 32-bit access register]
A ROM correction control register can be written under the following cases only.
Follow the arrow steps as described below.
Table:6.2.2 Value of Registers and Condition List
* 1: The registers are ROM correction address registers and ROM correction data registers.
bp 76543210
Flag ----RC
MEN
RC
CEN
-RC
RWE
At reset 00000000
Access R R R R R/W R/W R R/W
bp Flag Description Set condition
7-4 - - -
3 RCMEN
ROM correction mode clear enable 0: ROM correction mode (RCCEN) clear disabled
1: ROM correction mode (RCCEN) clear enabled
2 RCCEN
ROM correction mode 0: ROM correction disabled
1: ROM correction enabled
1-- -
0RCRWE
ROM correction address / data register
write enable
0: Write disabled
1: Write enabled
RCMEN RCCEN RCRWE Condition
0 0 0 Disable the interrupt (except the NMI)
↓ ROM correction reset status
0 0 1 Register change setting (* 1)
↓ Register changeable status
0 1 0 ROM correction enabled status
↓ ROM correction enabled status
1 1 0 ROM correction reset setting 1
↓ ROM correction reset setting status
0 0 0 ROM correction reset setting 2
ROM correction reset status