Panasonic MN103S

Chapter 8
8-bit Timer
Event Count VIII - 39
8.6.2 Setup Example
■ Event Count Setup Example
If the rising edge of the TM1IO input pin is detected 5 times with the timer 1, an interrupt is generated. An exam-
ple setup procedure, with a description of each step is shown below.
Setup Procedure Description
(1) Stop the counter
TM1MD(0x0000A181)
bp6: TM1LDE=0
bp7: TM1CNE=0
(1) Set the TM1LDE flag and the TM1CNE flag of the timer
1 mode register (TM1MD) to “0” to stop timer 1
counting.
(2) Disable the interrupt
G3ICR(0x0000890C)
bp9: G3IE1=0
(2) Set the G3IE1 flag of the G3ICR register to “0” to disable
the interrupt.
(3) Set the TM1IO pin to input
P3DIR(0x0000A023)
bp1: P31D=0
(3) Set the P31D flag of the port 3 I/O control register
(P3DIR) to “0” to set to the input pin.
(4) Set the interrupt generation cycle
TM1BR(0x0000A189)=0x04
(4) Set the interrupt generation cycle to the timer 1 base
register (TM1BR). The setting value should be 4
because counting is 5.
(5) Select the count clock source
TM1MD(0x0000A181)
bp2-0: TM1CK2-0=111
(5) Select the TM1IO pin to the count clock source by the
TM1CK2-0 flags of the TM1MD register.
(6) Initialize the timer 1
TM1MD(0x0000A181)
bp6: TM1LDE=1
(6) Set the TM1LDE flag of the TM1MD register to “1” to
initialize the timer 1. The value of the TM1BR is loaded
into the TM1BC counter. Reset the TM1LDE flag to “0”
after setting.
(7) Set the interrupt level
G3ICR(0x0000890C)
bp14-12: G3LV2-0=100
(7) Set the interrupt level by the G3LV2-0 flag of the G3ICR
register. If the interrupt request flag has been set
already , clear the request flag.
(8) Enable the interrupt
G3ICR(0x0000890C)
bp9: G3IE1=1
(8) Set the G3IE1 flag of the G3ICR register to “1” to enable
the interrupt.
(9) Start the timer operation
TM1MD(0x0000A181)
bp7: TM1CNE=1
(9) Set the TM1CNE flag of the TM1MD register to “1” to
operate the timer 1.