Panasonic MN103S

Chapter 5
Interrupt Controller
Control Registers V - 33
5.2.7 External Interrupt Condition Specification Register
This register specifies the external interrupt generation conditions.
■ External Interrupt Condition Specification Register 0 (EXTMDO: 0x00008A80) [8, 16-bit Access
Register]
bp 1514131211109876543210
Flag IR7
TG1
IR7
TG0
IR6
TG1
IR6
TG0
IR5
TG1
IR5
TG0
IR4
TG1
IR4
TG0
IR3
TG1
IR3
TG0
IR2
TG1
IR2
TG0
IR1
TG1
IR1
TG0
IR0
TG1
IR0
TG0
At reset 0000000000000000
Access R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W
bp Flag Description Set condition
15-14
IR7TG1
IR7TG0
IRQ7 pin trigger condition setting 00: Rising edge
01: Falling edge
10: “H” level
11: “L” level
13-12
IR6TG1
IR6TG0
IRQ6 pin trigger condition setting 00: Rising edge
01: Falling edge
10: “H” level
11: “L” level
11-10
IR5TG1
IR5TG0
IRQ5 pin trigger condition setting 00: Rising edge
01: Falling edge
10: “H” level
11: “L” level
9-8
IR4TG1
IR4TG0
IRQ4 pin trigger condition setting 00: Rising edge
01: Falling edge
10: “H” level
11: “L” level
7-6
IR3TG1
IR3TG0
IRQ3 pin trigger condition setting 00: Rising edge
01: Falling edge
10: “H” level
11: “L” level
5-4
IR2TG1
IR2TG0
IRQ2 pin trigger condition setting 00: Rising edge
01: Falling edge
10: “H” level
11: “L” level
3-2
IR1TG1
IR1TG0
IRQ1 pin trigger condition setting 00: Rising edge
01: Falling edge
10: “H” level
11: “L” level
1-0
IR0TG1
IR0TG0
IRQ0 pin trigger condition setting 00: Rising edge
01: Falling edge
10: “H” level
11: “L” level