Panasonic MN103S

Chapter 2
CPU Basics
Block Diagram II - 3
2.2 Block Diagram
Table: 2.2.1 shows the block diagram focusing on the CPU.
Figure:2.2.1 CPU Block Diagram
Extension
function unit
Extension interface
Address register Data register
A0
A1
A2
A3
D0
D1
D2
D3
SP
MDR
PSW
AU
LU
Barrel
shifter
Program
counter
block
AU
Instruction address
Watchdog
timer
Clock
generator
MCLK
IOCLK
PLL
Clock
Instruction
decoder
Instruction execution
control block
Instruction
queue
Instruction data
Interrupt
control
block
Internal
ROM
Bus control block
Internal
RAM
Operand data
Operand address
16-bit timer8-bit timerSerial I/F3-phase PWMAD converter