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Panasonic MN103S

Panasonic MN103S
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Chapter 8
8-bit Timer
VIII - 30 Prescaler
8.3 Prescaler
8.3.1 Prescaler Operation
Prescaler Operation
Prescaler outputs 1/8, 1/32, and 1/128 dividing clock with using IOCLK as an input clock.
Count Clock Source and Prescaler
When selecting IOCLK/8, IOCLK/32, or IOCLK/128 to count clock source of timer, the prescaler should be set
up. The following table shows the relationship between count clock sources and controlled registers.
When setting a count clock source to 128 dividing, set count clock source selection of the timer mode register
(TM0MD, TM2MD, TM4MD, TM6MD, TM14MD and TM16MD) to IOCLK/128 of “111”.
Table:8.3.1 Count Clock Source and Prescaler
Count clock source Prescaler setting Register to be set up
IOCLK (Timer 0 to 7, 14 to 17) - -
IOCLK/8 (Timer 0 to 3) Need TM03PSC
IOCLK/8 (Timer 4 to 7) Need TM47PSC
IOCLK/8 (Timer 14 to 17) Need TM1417PSC
IOCLK/32 (Timer 0 to 3) Need TM03PSC
IOCLK/32 (Timer 4 to 7) Need TM47PSC
IOCLK/32 (Timer 14 to 17) Need TM1417PSC
IOCLK/128 (Timer 0,2,4,6,14,16) Need TMEXPSC8
Timer n underflow - -
TMnIO pin input - -

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