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Panasonic MN103S - ROM Correction Address Registers

Panasonic MN103S
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Chapter 6
ROM Correction
ROM Correction Control Registers VI - 5
6.2.3 ROM Correction Address Registers
Each of these registers specifies the address (channel number) at which ROM correction is to be performed. Data
can be written only when the RCRWE flag in the ROM correction control register (RCRCTR) is “1”.
ROM Correction 0 Address Register (RCROAR: 0x7FF00100) [32-bit access register]
ROM Correction 1 Address Register (RCR1AR: 0x7FF00110) [32-bit access register]
bp 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Flag RC0
CEN
-----------RC0
AD19
RC0
AD18
RC0
AD17
RC0
AD16
At reset 000000000000xxxx
Access R/WRRRRRRRRRRRR/WR/WR/WR/W
bp 1514131211109876543210
Flag RC0
AD15
RC0
AD14
RC0
AD13
RC0
AD12
RC0
AD11
RC0
AD10
RC0
AD9
RC0
AD8
RC0
AD7
RC0
AD6
RC0
AD5
RC0
AD4
RC0
AD3
RC0
AD2
RC0
AD1
RC0
AD0
At reset xxxxxxxxxxxxxxxx
Access R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W
bp Flag Description Set condition
31 RC0CEN
ROM correction channel o enable 0: ROM correction disabled
1: ROM correction enabled
30-20 - - -
19-0
RC0AD19
to
RC0AD0
ROM correction channel 0 address These bits specify the lower 20 bits of the ROM address subject to
ROM correction. 8 bytes of data from the above ROM address to
(ROM address + 7) are subject to ROM correction.
bp 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Flag RC1
CEN
-----------RC1
AD19
RC1
AD18
RC1
AD17
RC1
AD16
At rest 000000000000xxxx
Access R/WRRRRRRRRRRRR/WR/WR/WR/W
bp 1514131211109876543210
Flag RC1
AD15
RC1
AD14
RC1
AD13
RC1
AD12
RC1
AD11
RC1
AD10
RC1
AD9
RC1
AD8
RC1
AD7
RC1
AD6
RC1
AD5
RC1
AD4
RC1
AD3
RC1
AD2
RC1
AD1
RC1
AD0
At reset xxxxxxxxxxxxxxxx
Access R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W
bp Flag Description Set condition
31 RC1CEN
ROM correction channel 1 enable 0: ROM correction disabled
1: ROM correction enabled
30-20 - - -
19-0
RC1AD19
to
RC1AD0
ROM correction channel 1 address These bits specify the lower 20 bits of the ROM address subject to
ROM correction. 8 bytes of data from the above ROM address to
(ROM address + 7) are subject to ROM correction.

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