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Panasonic MN103S

Panasonic MN103S
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Chapter 9
16-bit Timer
Prescaler IX - 37
9.3 Prescaler
9.3.1 Prescaler Operation
Prescaler operation
Prescaler outputs IOCLK/8 and IOCLK/64 with using IOCLK as an input clock and MCLK/8 with using MCLK
as an input clock.
Count Source and Prescaler
When IOCLK/8, IOCLK/64 or MCLK/8 is selected as a timer count source, the setting of the prescaler is neces-
sary. Table: 9.3.1 shows the count clock source and controlled registers.
Table:9.3.1 Count Source and Prescaler
When selecting MCLK or MCLK/8, the setting of the TMnCLKSEL register is necessary.
Count clock source Setting of prescaler Set register
IOCLK (Timer 8 to 13) - -
IOCLK/8 (Timer 8) O TM8PSC
IOCLK/8 (Timer 9) O TM9PSC
IOCLK/8 (Timer 10) O TM10PSC
IOCLK/8 (Timer 11) O TM11PSC
IOCLK/8 (Timer 12) O TM12PSC
IOCLK/8 (Timer 13) O TM13PSC
IOCLK/64 (Timer 8) O TMEXPPSC16
IOCLK/64 (Timer 9) O TMEXPPSC16
MCLK (Timer 12 to 13)) - TMnCLKSEL
MCLK/8 (Timer 12) O TM12PSC, TM12CLKSEL
MCLK/8 (Timer 13) O TM13PSC, TM13CLKSEL
Timer n underflow - -
TImer pin input - -

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