Panasonic MN103S - Block Diagram

Chapter 9
16-bit Timer
IX - 6 Overview
9.1.3 Block Diagram
■ 16-bit TImer Block Diagram
Figure:9.1.4 16-bit TImer Block Diagram
Timer
TMCA
TMBC
TMCB
NTMHIRQ
NTMAIRQ
TMAIN
TMBIN
TMIN0
TMIN1
TMIN2
TMIN3
NTMBIRQ
TMAOUT
TMBOUT
Count
control
Count source
Event count
two-phase encoding
Pin input
Pin input control
Capture
Capture
Match
Match
Compare/capture register A
Compare/capture register B
Compare/capture B interrupt
Compare/capture A interrupt
Pin
output
control
Overflow/underflow interrupt
Pin output
Binary counter