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Panasonic MN103S

Panasonic MN103S
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Chapter 8
8-bit Timer
Timer Output Function VIII - 37
8.5.2 Setup Example
Timer Output Setup Example
The TM1IO pin outputs 100 KHz pulse by using timer 1. In order to output 100 KHz, select IOCLK for a count
clock source, and set 1/2 cycle (200 KHz) to the timer 1 base register.
An example setup procedure, with a description of each step is shown below.
Figure:8.5.2 Output Waveform of TM1IO pin
TM1BC starts to count down from 0x95. When an underflow occurs, the signal of theTM1IO output pin is
inverted; and, TM1BC starts to count down from 0x95 again.
Setup Procedure Description
(1) Check the counter stopped
TM1MD (0x0000A181)
bp6: TM1LDE=0
bp7: TM1CNE=0
(1) Set the TM1LDE flag and the TM1CNE flag of the timer
1 mode register (TM1MD) to “0” to stop timer 1
counting.
(2) Set the TM1IO pin to output and mode
P3MD (0x0000A033)
bp1: P31M=1
P3DIR (0x0000A023)
bp1: P31D=1
(2) Set the P3MD flag of the port 3 mode register (P31M) to
“1” for TM1IO pin setting.
Set the P31D flag of the port 3 I/O control register
(P3DIR) to “1” for output pin setting.
(3) Set 1/2 cycle for timer output
TM1BR(0x0000A189)=0x95
(3) Set 1/2 cycle of the timer output to the timer 1 base
register (TM1BR). The setting value is 149 (0x95) due
to 200KHz. Setting value = (10MHZ × 2/6) / 200KHz -1
(4) Select the count clock source
TM1MD(0x0000A181)
bp2-0: TM1CK2-0=000
(4) Select IOCLK to the count clock source by the TM1CK2-
0 flag of the TM1MD register.
(5) Initialize timer 1
TM1MD(0x0000A181)
bp6: TM1LDE=1
(5) Set the TM1LDE flag of the TM1MD register to “1” to
initialize timer 1. The value of the TM1BR register is
loaded to the TM1BC counter; and, output of TM1IO
changes “L”. Reset the TM1LDE flag to “0”.
(6) Start the timer operation
TM1MD (0 x0 00 0A181)
bp7: TM1CNE=1
(6) Set the TM1CNE flag of the TM1MD register to “1” to
operate timer 1.
100KHz
TMOIO output

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