Panasonic MN103S

Chapter 10
Motor Control PWM
Control Registers X - 9
10.2.4 PWM Output Control Registers
PWM output control register is used to switch between 2 output sources, PWM output or H/L level output.
This register can select double-buffer or single-buffer mode by the SDSELBn flag of the PWM mode control reg-
ister (PWMMDn). When double-buffer mode is selected, the value of PWMSELn is loaded into the register at the
timing selected with PWMMDn register. When the PWM counter is not running, the double-buffer value is
loaded into the register as is regardless of the specified read timing.
■ PWM0 Output Control Register (PWMSEL0: 0x0000A308) [8,16-bit Access Register]
bp 1514131211109876543210
Flag
----
PSEL
N02
PSEL
02
PSEL
N01
PSEL
01
PSEL
N00
PSEL
00
OTLV
N02
OTLV
02
OTLV
N01
OTLV
01
OTLV
N00
OTLV
00
At reset0000000000000000
AccessRRRRR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W
bp Flag Description Setting condition
15-12 - - -
11 PSELN02
NPWM02 output sources 0: PWM output
1: H/L level output
10 PSEL02
PWM02 output sources 0: PWM output
1: H/L level output
9PSELN01
NPWM01 output sources 0: PWM output
1: H/L level output
8PSEL01
PWM01 output sources 0: PWM output
1: H/L level output
7PSELN00
NPWM00 output sources 0: PWM output
1: H/L level output
6PSEL00
PWM00 output sources 0: PWM output
1: H/L level output
5OTLVN02
NPWM02 H/L level output 0: L level output
1: H level output
4OTLV02
PWM02 H/L level output 0: L level output
1: H level output
3OTLVN01
NPWM01 H/L level output 0: L level output
1: H level output
2OTLV01
PWM01 H/L level output 0: L level output
1: H level output
1OTLVN00
NPWM00 H/L level output 0: L level output
1: H level output
0OTLV00
PWM00 H/L level output 0: L level output
1: H level output