Chapter 2
CPU Basics
II - 8 Programming Model
2.3.2 Control Registers
The microcontroller core uses the memory-mapped I/O method to allocate a variety of control registers in a con-
trol register address space between x’00008000 and x’00009FFF.
The registers listed below are described in this section. For details on other control registers, refer to the respec-
tive sections that explain the various built-in peripheral functions.
Table:2.3.2 Control Register
■
CPU Mode Register (CPUM: 0x00008040) [8, 16-bit Access Register]
This register is prohibited to access.
..
Never change the CPU mode register.
..
Registers Address R/W Access size Function Pages
CPU mode CPUM 0x00008040 R/W 8, 16 CPU mode register II-8
bp 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Flag
----------
OSCID STSEL HASEL SLSEL
OSC1 OSC0
At reset0000000000000000
Access RRRRRRRRRRRR/WR/WR/WR/WR/W
bp Flag Description Set condition
15-0 -
System reserve
Setting prohibited
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