Chapter 2
CPU Basics
Programming Model II - 7
■ Processor Status Word (16-bit x 1)
This register indicates the CPU status, and stores flags for operation results and interrupt mask level, etc.
Table:2.3.1 Processor Status Word
bp 1514131211109876543210
Flag - - S1 S0 IE IM2 IM1 IM0 - - - - V C N Z
At reset0000000000000000
Access R R R/W R/W R/W R/W R/W R/W R R R R R/W R/W R/W R/W
bp Flag Description Set condition
15-14 - - -
13-12
S1
S0
Software bit
These are the software control bits for the operating system
(OS). These bits cannot be used by general user programs.
11 IE Interrupt enable
0: disabled
1: enabled
This flag permits and accepts all interrupts except reset and
non-maskable interrupts. When the CPU accepts an interrupt
request, the IE will be cleared to 0. Therefore, IE flag must be
set to “1”, if nested interrupts need to be accepted in the inter-
rupt processing program.
10-8
IM2
IM1
IM0
Interrupt mask level
The three bits defines the mask level from level 0 (000) to level
7 (111), with level 0 being the highest mask level. The CPU
accepts only those interrupt requests of a level higher than the
mask level indicated here. When an interrupt is accepted, the
IM flag is set to the priority level of that interrupt. Until the pro-
cessing of the accepted interrupt is completed, the CPU does
not accept interrupts with the same interrupt level or lower.
7-4 - - -
3 V Overflow flag
0: When an overflow does not occurs in a signed value in the
course of executing an operation.
1: When an overflow occurs in a signed value in the
course of executing an operation.
2 C Carry flag
0: When a carry or a borrow from the most significant bit
(MSB) did not occur as a result of computation.
1: When a carry or a borrow from the most significant bit
(MSB) occured as a result of computation.
1 N Negative flag
0: When the most significant bit (MSB) is "0" as a result of
computation.
1: When the most significant bit (MSB) is “1” as a result of
computation.
0 Z Zero flag
0: Operation result is not “0”.
1: Operation result is “0”.
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