Chapter 10
Motor Control PWM
X - 8 Control Registers
■ PWM1 Output Polarity Control Register (OUTMD1: 0x0000A334) [8,16-bit Access Register]
bp 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Flag
----------
PXD
TNW
1
PXD
TW1
PXD
TNV
1
PXD
TV1
PXD
TNU
1
PXD
TU1
At reset0000000000000000
AccessRRRRRRRRRRR/WR/WR/WR/WR/WR/W
bp Flag Description Setting condition
15-6 - - -
5PXDTNW1
Output polarity for NPWM12 0: Positive phase
1: Negative phase
4PXDTW1
Output polarity for PWM12 0: Positive phase
1: Negative phase
3 PXDTNV1
Output polarity for NPWM11 0: Positive phase
1: Negative phase
2 PXDTV1
Output polarity for PWM11 0: Positive phase
1: Negative phase
1 PXDTNU1
Output polarity for NPWM10 0: Positive phase
1: Negative phase
0PXDTU1
Output polarity for PWM10 0: Positive phase
1: Negative phase