Chapter 8
8-bit Timer
Control Registers VIII - 29
■ Timer 17 Mode Register (TM17MD: 0x0000A1C5) [8-bit Access Register]
bp 76543210
Flag TM17
CNE
TM17
LDE
---TM17
CK2
TM17
CK1
TM17
CK0
At reset 00000000
Access R/W R/W R R R R/W R/W R/W
bp Flag Description Set condition
7TM17CNE
Timer operation enable 0: Operation disabled
1: Operation enabled
6TM17LDE
Timer initialization 0: Normal operation
1: Initialization
TM17BR value is loaded into TM17BC. Timer output 17 is set to “L”
level.
5-3 - - -
2-0
TM17CK2
TM17CK1
TM17CK0
Count clock source selection 000: IOCLK
001: IOCLK/8
010: IOCLK/32
011: Cascading with timer 16
100: Timer 14 underflow
101: Timer 15 underflow
110: Timer 16 underflow
111: TM17IO pin input (rising edge)
When 1/8 IOCLK and 1/32 IOCLK are used, the prescaler control reg-
ister (TM1417PSC) should be set.
To Next Page
Loading...
