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Panasonic MN103S - Page 217

Panasonic MN103S
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Chapter 8
8-bit Timer
Control Registers VIII - 27
Timer 15 Mode Register (TM15MD: 0x0000A1C1) [8-bit Access Register]
bp 76543210
Flag TM15
CNE
TM15
LDE
---TM15
CK2
TM15
CK1
TM15
CK0
At reset 00000000
Access R/W R/W R R R R/W R/W R/W
bp Flag Description Set condition
7TM15CNE
Timer operation enable 0: Operation disabled
1: Operation enabled
6TM15LDE
Timer initialization 0: Normal operation
1: Initialization
TM15BR value is loaded into TM15BC.
5-3 - - -
2-0
TM15CK2
TM15CK1
TM15CK0
Count clock source selection 000: IOCLK
001: IOCLK/8
010: IOCLK/32
011: Cascading with timer 14
100: Timer 14 underflow
101: Setting prohibited
110: Timer 16 underflow
111: Setting prohibited
When 1/8 IOCLK and 1/32 IOCLK are used, the prescaler control reg-
ister (TM1417PSC) should be set.

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