Chapter 9
16-bit Timer
Control registers IX - 29
■ Timer 11 Compare/Capture A Mode Register (TM11MDA: 0x0000A264) [8-bit Access Register]
bp 76543210
Flag TM
AM1
TM
AM0
TM
AEG
TM
ACE
--TM
A01
TM
A00
At reset 00000000
Access R/W R/W R/W R/W R R R/W R/W
bp Flag Description Setting condition
7-6
TMAM1
TMAM0
Timer compare/capture A operation
mode selection
00: Compare register (double buffer)
01: Compare register (single buffer)
10: Capture register ( single-edge operation)
Capture at the edge selected by timer A pin polarity selection bit.
11: Capture register ( both-edge operation)
Selection by timer A pin polarity selection is ignored.
5TMAEG
Timer A pin polarity selection 0 Capture Rising edge (when single edge is
selected)
Count control Counts when “H” level is input
Activation trigger Falling edge
Pin output Positive polarity output
“L” level when reset, “H” level when
set
1 Capture Falling edge (when single edge is
selected)
Count control Counts when “H” level is input
Activation trigger Rising edge
Pin output Negative polarity output
“H” level when reset, “L” level when
set
4TMACE
Timer capture A operation enable 0: Capture operation disabled (pin input is ignored)
1: Capture operation enabled
3-2 - - -
1-0
TMA01
TMA00
Timer A output waveform selection 00: Set when TMBC and TMCA match, reset when TMBC and
TMCB match
01: Set when TMBC and TMCA match, reset when TMBC overflows
10: Set when TMBC and TMCA match (reset only when timer is ini-
tialized)
11: Timer output (output is inverted when TMBC and TMCA match)
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