Panasonic MN103S

Chapter 1
Overview
Pin Description I - 13
P31
P32
P33
P34
P35
P36
P37
50
51
52
53
55
57
58
I/O TM1IO
TM2IO
TM3IO
TM4IO
TM5IO
TM8AIO
TM8BIO
I/O port 3 8-bit CMOS I/O ports.
Each bit can be set individually as either
input or output by the P3DIR register.
Pull-up resistor for ech bit can be selected
individually by the P3PLU register.
At reset, the input mode (P31 to P37) is
selected, and pull-up resistor is disabled.
P42
P43
P46
P47
59
60
61
62
I/O TM9AIO
TM9BIO
TM10AIO
TM10BIO
I/O port 4 8-bit CMOS I/O port.
Each bit can be set individually as either
input or output by the P4DIR register.
Pull-up resistor for each bit can be selected
individually by the P4PLU register.
At reset, the input mode (P42, P43, P46,
P47) is selected and pull-up resistor is dis-
abled.
P51
P52
P53
P54
P55
P56
P57
63
64
65
66
67
68
69
I/O TM7IO
PWM00
NPWM00
PWM01
NPWM01
PWM02
NPWM02
I/O port 5 8-bit CMOS I/O ports.
Each bit can be set individually as either
input or output by the P5DIR register.
Pull-up resistor for each bit can be selected
individually by the P5PLU register.
At reset, the input mode (P51 to P57) is
selected, and pull-up resistor is disabled.
P62
P63
P64
P65
P66
P67
70
71
72
73
74
75
I/O PWM10
NPWM10
PWM11
NPWM11
PWM12
NPWM12
I/O port 6 8-bit CMOS I/O ports.
Each bit can be set individually as either
input or output by the P6DIR register.
Pull-up resistor for each bit can be selected
individually by the P6PLU register.
At reset, the input mode (P62 to P67) is
selected, and pull-up resistor is disabled.
P72
P73
77
79
I/O TM11IO0
TM11IO1
I/O port 7 8-bit CMOS I/O ports.
Each bit can be set individually as either
input or output by the P7DIR register.
P pull-up resistor for each bit can be selected
individually by the P7PLU register.
At reset, the input mode (P72, P73) is
selected, and pull-up resistor is disabled.
P80
P81
P82
P83
1
2
3
4
I/O IRQ00
IRQ01
IRQ02
IRQ03
I/O port 8
8-bit CMOS input ports.
Each bit can be set individually as either
input or output by the P8PLU register.
Pull-up resistor for each bit can be selected
individually by the P8PLU register.
At reset, the input mode (P80 to P83) is
selected, and pull-up resistor is disabled.
P90
P91
P92
P93
P94
P95
P96
P97
6
7
8
9
11
13
14
15
I/O ADIN00
ADIN01
ADIN02
ADIN03
ADIN04
ADIN05
ADIN06
ADIN07
I/O port 9 8-bit CMOS input ports.
Each bit can be set individually as either
input or output by the P9DIR register.
Pull-up resistor for each bit can be selected
individually by the P9PLU register.
At reset, the input mode (P90 to P97) is
selected, and pull-up resistor is disabled.
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
16
17
18
19
20
21
22
23
I/O ADIN08
ADIN09
ADIN10
ADIN11
ADIN12
ADIN13
ADIN14
ADIN15
I/O port A 8-bit CMOS input ports.
Each bit can be set individually as either
input or output by the PADIR register.
Pull-up resistor for each bit can be selected
individually by the PAPLU register.
At reset, the input mode (PA0 to PA7) is
selected, and pull-up resistor is disabled.
Name
TQFP 48
Pin No.
I/O Other Function Function Description