Panasonic MN103S

Chapter 12
Serial interface 0 and 1
XII - 14 Operation
■ Transmission Timing
Figure:12.3.3 Transmission Timing (At Falling Edge)
■ Reception Timing
Figure:12.3.4 Reception Timing (At Rising Edge)
T
01234567
At master
Tmax=3.5T
Clock
(SBTn pin)
Output pin
(SBOn pin)
(Data set in SBnTB)
SC2TBSY
Transfer bit
counter
Interrupt(SCnTIRQ)
T
01234567
At master
Tmax=3.5T
Clock
(SBTn pin)
Input pin
(SBIn pin)
Interrupt
(SCnRIRQ)
SCAnRBSY
Transfer bit
counter