Panasonic MN103S

Chapter 13
Serial Interface 2
Control Registers XIII - 9
■ Serial Interface 2 Mode Register 3 (SC2CTR3: 0x0000A125) [8-bit Access Register]
bp 76543210
Flag SC2
FDC1
SC2
FDC0
--
SC2
PSCE
SC2
PSC2
SC2
PSC1
SC2
PSC0
At reset 00000000
Access R/W R/W R R R/W R/W R/W R/W
bp Flag Description Setting condition
7-6
SC2FDC 1
SC2FDC 0
Output selection after SB0 last
data transmission
00: Fixed at "1"(High) output
10: Fixed at "0"(Low) output
X1: Last data retained
5-4 - - -
3 SC2PSCE
Prescaler count control 0: Count disabled
1: Count enabled
2-0
SC2PSC2
SC2PSC1
SC2PSC0
Clock selection Clock synchronous UART
000: 1/2 of timer underflow
001: 1/4 of timer underflow
010: 1/16 of timer underflow
011: 1/64 of timer underflow
100: IOCLK/2
101: IOCLK/4
110: Setting prohibited
111: Setting prohibited
000: 1/32 of timer underflow
001: 1/64 of timer underflow
010: 1/256 of timer underflow
011: 1/1024 of timer underflow
100: IOCLK/32
101: IOCLK/64
110: Setting prohibited
111: Setting prohibited
Timer is selected by the serial interface clock selection register (SIFCLK).