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Panasonic MN103S

Panasonic MN103S
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Chapter 14
A/D Converter
Operation XIV - 37
When the timer 12 operation is started, A/D conversion is started every 1 ms. When A/D conversion is completed
with channel 0 and 1, the AD0 complete interrupt is generated.
Figure:14.3.8 A/D Conversion Timing (0 to 2 Channel Converted Once Each)
(13) Set the timer 12: Select the timer compare/
capture A operation mode
TM12MDA(0x0000A284)
bp7-6: TMAM1-0=00
(13) Set the compare register (double buffer) to the function
of the timer 12 compare/capture register by the
TMAM1-0 flags of the timer 12 compare/capture A
mode register (TM12MDA).
(14) Set the timer 12: Initialize the timer 12
TM12MD(0x0000A280)
bp6: TMLDE=1
(14) Set the TMLDE flag of the TM11MD register to “1” to
initialize the timer 12. The value of the compare
register buffer is loaded into the TM12CA register.
Reset the TMLDE flag to “0” after setting.
(15) Set the timer 12: Start the timer operation
TM12MD(0x0000A280)
bp7: TMCNE=1
(15) Set the TMCNE flag of the TM12MD register to “1” to
operate the timer 8.
(16) Set the AD0: Read the A/D value
AN0BUF00 (0x0000A410)
AN0BUF01 (0x0000A414)
AN0BUF02 (0x0000A418)
(16) A/D0 conversion data buffer 0 and 1 (ANOBUF0,
ANOBUF1) are read by the AD0 complete interrupt
processing after A/D conversion ends .
Setup Procedure Description
External trigger
(TM12 compare a match)
Conversion operation
Interrupt
ch0 ch1 ch2 ch0 ch1 ch2

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