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Panasonic MN103S - Page 495

Panasonic MN103S
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Chapter 16
Appendix
Extension Instruction Specification XVI - 43
GETCHX (transfer instruction of high-order 32 bits of multiply and accumulate register)
[Instruction format (macro name)]
GETCHX Dn
[Assembler mnemonic]
udf12 Dn, Dn
[Operation]
This instruction transfers the content of the multiply and accumulate register MCRH to Dn.
The instruction places the content of the multiply and accumulate overflow detection flag register MCVF in the V
flag.
[Flag changes]
When multiply and accumulate overflow is not detected (MCVF = 0)
When multiply and accumulate overflow is detected (MCVF = 1)
[Note for programming]
Updating of the PSW as a result of flag changes is delayed by 1 instruction.
Note, however, that flags can be evaluated for the Bcc and Lcc instructions before flag changes are reflected in the
PSW.
Flag Change Condition
V 0 Indicates that multiply and accumulate operation is valid.
C 0 Always 0.
N * Undefined
Z * Undefined
Flag Change Condition
V 1 Indicates that multiply and accumulate operation is invalid.
C 0 Always 0.
N * Undefined
Z * Undefined

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